1. Field of the Invention
This invention relates to a semiconductor logic device, and, in particular, to a programmable logic device including an array of AND and OR gates. A programmable logic device (PLD) includes an AND plane and an OR plane, and there are three variations: (1) both of AND and OR planes are programmable (also referred to as a programmable logic array or PLA); (2) AND plane is programmable but OR plane is non-programmable (also referred to as a programmable array logic or PAL); and (3) AND plane is non-programmable but OR plane is programmable. Here, the term PLD should be understood to include all of these three variations.
2. Description of the Prior Art
A programmable logic device includes an AND plane and an OR plane, at least one of which is provided with a plurality of programmable elements arranged in the form of an array. When programmed, a combinational logic, whether sequential or not, is defined by the programmable elements of the AND and OR planes. When defining a sequential logic, a flip-flop is typically provided in addition to the AND and OR planes, whereby an output from the OR plane is input into the flip-flop. In a programmable logic device provided with a flip-flop, such a logic as a counter or shift register can be defined arbitrarily.
When the degree of integration of such a programmable logic device is increased, if the AND plane includes a plurality of programmable elements, the size of an array in the AND plane increases proportionally depending on a product between twice the number of input lines i and the number of product term lines p (i.e., 2i.multidot.p). However, as the size of the array increases, the number of unused programmable elements when defining a logic circuit in the programmable logic device increases. For example, when defining a 4-bit counter using four sets of PALs, each set including a programmable AND array having 50 input lines, a fixed OR array having 8 input lines, and one flip-flop, the number of actually used programmable elements is 74 even if a total of 3,200 programmable elements are provided in the device. Thus, a majority of the programmable elements remains unused, and this tendency is pronounced as the size of a programmable logic device further increases.